FUNCTIONAL INTERNAL BLOCK DESCRIPTION
by the gate-drain capacitance of the High Side FET, then the
displacement current injected into the Low Side gate drive
output will be approximately the same value. Therefore, to
ensure the Low Side drivers can be held off, the voltage drop
across the Low Side gate driver must be lower than the
threshold voltage of the Low Side FET (see Figure 14 ).
Similarly, during large negative dV/dt, the High Side FET
will be able to remain off if its gate drive Low Side switch,
develops a voltage drop less than the threshold voltage of the
High Side FET. The gate drive Low Side switch discharges
the gate to the source.
Additionally, during negative dV/dt the Low Side gate drive
could be forced below ground. The Low Side FETs must not
inject detrimental substrate currents in this condition.
The occurrence of these cases depends on the polarity of
the load current during switching.
Amplifier with the Over-current Comparator. These two
blocks are common for all three driver phases.
Current Sense Amplifier
This amplifier is usually connected as a differential
amplifier (see Figure 9 ). It senses a current flowing through
the external FETs as a voltage across the current sense
resistor R SENSE . Since the amplifier common mode range
does not extend below ground, it is necessary to use an
external reference to permit measuring both positive and
negative currents.
The amplifier output can be monitored directly (e.g. by the
microcontroller’s ADC) at the AMP_OUT pin, providing the
means for closed loop control with the 33937A.
The output voltage is internally compared with the Over-
current Comparator threshold voltage (see Figure 22 ).
Over-current Comparator
Driver
Zo
33927
33937A
VLS
Low
-Side
LS
Control
Px_HS_S
iCDG
Px_LS_G
G
-
Rg
CDG
+
CGS
D
Phase x
Output
CDS
Discrete
FET
Package
The amplified voltage across R SENSE is compared with the
pre-set threshold value by the over-current comparator input.
If the Current Sense Amplifier output voltage exceeds the
threshold of the Over-current Comparator it would change
the status of its output (OC_OUT pin) and the fault condition
would be latched (see Figure 18 ).
The occurrence of this fault would be signalled by the
return value of the Status Register 0. If the proper Interrupt
Mask has been set, this fault condition will generate an
interrupt - the INT pin will be asserted High. The INT will be
Px_LS_S
S
held in the High state until the fault is removed, and the
Px_HS_G
Px_LS_G
Deadtime
Phase
Return
appropriate bit in the Status Register 0 is cleared by the
CLINT0 command. This fault reporting technique is
described in detail in the Logic Commands and Registers
section.
Desaturation Detector
VSUP
Phase x Output Voltage
dV/dt
-VD
Figure 14. Positive DV/dt Transient
The Desaturation Detector is a comparator integrated into
the output driver of each phase channel. It provides an
additional means to protect against “Short-to-Ground” fault
condition. A short to ground is detected by an abnormally
high-voltage drop in VDS of the High Side FET. Note that if
the gate-source voltage of the High Side FET drops below
saturation, the device will go into linear mode of conduction
which can also cause a desaturation error.
DRIVER FAULT PROTECTION
The 33937A IC integrates several protection mechanisms
against various faults. The first of them is the Current Sense
33937A
Analog Integrated Circuit Device Data
26
Freescale Semiconductor
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